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(Created page with "field-programmable gate array http://en.wikipedia.org/wiki/Field-programmable_gate_array ==Cartes== * Papilio") |
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field-programmable gate array http://en.wikipedia.org/wiki/Field-programmable_gate_array |
field-programmable gate array http://en.wikipedia.org/wiki/Field-programmable_gate_array |
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Architecture matérielle reconfigurable (dynamiquement) pour synthètiser un processeur/coprocesseur cible. |
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* [[Papilio]] ([[Xilinx]] Spartan 3E) |
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* ARM Cortex A9 + [[Xilink]] Zynq-7000 (Linux distribution http://xillybus.com/xillinux) |
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** [http://www.zedboard.org ZedBoard et MicroZeb] |
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** [[Digilent ZYBO Zynq-7010 FPGA]] |
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* Stratix |
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* Arria |
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* Cyclone |
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** [http://www.adafruit.com/products/451 DE0 Nano (Altera Cyclone IV FPGA)] |
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* MAX |
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==Liens== |
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* FAQ & listes http://www.fpga-faq.com/FPGA_Boards.shtml |
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* OpenCores http://opencores.com/project : listes de cores de processeurs et coprocesseurs synthétisables sur FPGA |
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* [[Papilio]] |
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* VHDL Primer http://www.seas.upenn.edu/~ese171/vhdl/vhdl_primer.html |
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Latest revision as of 11:58, 15 August 2014
field-programmable gate array http://en.wikipedia.org/wiki/Field-programmable_gate_array
Architecture matérielle reconfigurable (dynamiquement) pour synthètiser un processeur/coprocesseur cible.
Cartes
- Papilio (Xilinx Spartan 3E)
- ARM Cortex A9 + Xilink Zynq-7000 (Linux distribution http://xillybus.com/xillinux)
- Stratix
- Arria
- Cyclone
- MAX
Liens
- FAQ & listes http://www.fpga-faq.com/FPGA_Boards.shtml
- OpenCores http://opencores.com/project : listes de cores de processeurs et coprocesseurs synthétisables sur FPGA
- VHDL Primer http://www.seas.upenn.edu/~ese171/vhdl/vhdl_primer.html